"At Florida Institute for Cybersecurity (FICS) Research, we have some open part-time OPS positions focusing on different aspects of SoC designs. Preferred candidates should be from ECE/CISE background and have strong expertise in Verilog/VHDL and CAD tools (Cadence/Synopsys/Xilinx). Prior experience in RTL development and/or physical design is a plus.
Part time OPS: 20 hours/week; 15$/hour.
